In modern communication systems, iterative signal processing technology is often used in receivers. For example, some DVB broadcasting receivers or WiFi transceivers may usually include LDPC decoding modules using iterative decoding algorithms, or further include iterative channel equalizers with iterative processing functionality. When the signal quality of input signals of these modules is relatively bad, several times of iteration may be required for signal processing performed by such modules. However, these modules with iterative processing functionality usually consume a huge amount of power when performing a significant number of iteration for signal processing. In extreme cases, the power may be too high, resulting in excess IR drops from a power regulator to these signal processing modules. Therefore, the modules can not work normally, which may lead to degradation of the receiver performance.
What is more, in mass production of IC chip, the performance of any individual chip may vary due to fluctuation of the condition of the semiconductor production line. Even with exactly same design, some chips may be able to work at a higher speed, while the others may only work at a lower speed. Typically, the faster chips can work properly under a lower supply voltage. However, in order to make sure that the slower chips can also work normally, the supply voltage is often configured higher than the voltage actually needed by the faster chips. In real application, the supply voltage range which appears on a chip's specification (datasheet), is usually given as within a certain percentage of a standardized voltage. The faster chips work under the standardized supply voltage, wasting a lot of power consumption. As a result, the maximum power consumption of an IC product is calculated based on its faster chips. With a known allowed maximum operation temperature of the chip, the maximum power consumption allowed can be calculated based on a device model of the faster chips. Usually an IC product's pinout and its packaging technology are chosen after calculating its maximum power consumption and highest operation temperature. Such calculation usually is not accurate due to the difficulty to accurately predict the power consumption. Therefore, in reality, a lot of margin is usually added.
The maximum allowed power limits the maximum iteration number discussed above. This configuration method can guarantee that the power consumption of all the chips, faster or slow, is lower than an upper limit when the maximum iteration number is executed, so that the chips will not work over temperature due to high power consumption, or the IR drop of the chips will not be too large to cause malfunction.
In order to make sure that the receivers can function properly under a larger IR drop, various methods have been used. One of the methods is to add certain timing margin when designing digital circuits for the receivers. Such margin may keep the system working normally under “the worst condition” (i.e. highest IR drop). Another method is to increase the supply voltage of some circuit modules in the receiver circuits. However, none of these methods can solve the problem of the large power consumption of the receiver system, while adding the margin also increases chip size. A further method is to limit the iteration number, at a smaller value after taking into consideration of the fluctuation of manufacturing process.